Our Silicon IP business is all about integrating more capabilities into an SoC—faster. We offer the world’s broadest portfolio of silicon IP—predesigned blocks of logic, memory, interfaces, analog, security, and embedded processors. All to help customers integrate more capabilities. Meet unique performance, power, and size requirements of their target applications. And get differentiated products to market quickly with reduced risk.
IntroductionAt Synopsys, we’re at the heart of the innovations that change the way we work and play. Self- driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security.
We are seeking for Analog Mixed Signal (A&MS) Layout Engineer to join our talented team.
Position
Junior Analog Mixed Signal Layout Design Engineer / Analog Layout Design Engineer
Job Description:
Will be trained to work on
Complete all design quality checks and data quality checks
Do layout verification for DRC/LVS/ERC/ANT/ESD/DFM
Work on custom layout Analog IPs like High Speed IOs, PLL, DLL, Bandgap, High Speed macros for PHY, Clock trees…
Floor planning, power design, signal routing strategy, EMIR awareness, parasitic optimization for layout blocks from schematics
Report design and status to mentors and design leads.
Create documents that required by the given tasks
Opportunities:
Opportunity to get in touch with the complete design flow of a real complicated Analog Mixed Signal Design from specification to silicon.
SNPS is the world number one IP provider. Work with many experts from around the world and talented highly motivated Viet Nam engineering team
Competitive salary and benefit. Strong support from company for health: Insurance, Sport clubs: Football, Ping- Pong, Badminton, Yoga, Zumba …
Professional, innovative, fair and fun working environment. Strong culture company.
Chance to work with bleeding edge technologies like: 2.5D/3D IC, Tbps Die to Die interface that enable Data Center, AI/ML, 5G applications.
Clear career path of self- development to either Technical Expert or Design Leader/Manager
Strong support from company for team building, social activities: Team trip, Family Day…
Travel to USA, Europe and Asia for training or on- site support.